The present disclosure generally relates to computer systems, and more specifically, to processing instructions.
In traditional computer processors, one or more history buffers back up data from general purpose registers (GPRs) when a new instruction is dispatched and the data in the target register needs to be saved. The data is saved in the history buffer in case that data needs to be restored to the GPRs in the future. One reason that the data is saved in the history buffer is branch prediction. If a branch instruction is received, circuitry can attempt to predict which way the branch will go before the branch has been executed. If the prediction is correct, the processor can continue processing. If the prediction is incorrect, processing is rolled back and the data in the registers is restored to the state that it was in before the mis-prediction. A flush process undoes these changes and restores the proper data from the history buffer to the GPRs. Other reasons that a flush might occur include errors, interrupts, load data misses, etc.
Some flush processes use the execution result bus to send history buffer entries that need to be restored to the GPRs. While this flush/restore process is underway, dispatch of a thread must be stopped to prevent collision of the dispatching instructions' target against the data from the restoring history buffers. This delay can significantly increase the penalty for branch mis-prediction and result in significant performance loss.